Senior Researcher — Applied Quantum Fault Tolerance
Location: Cologne, Germany
26 Jan 2026
We are seeking an Applied Quantum Fault Tolerance Researcher to strengthen our efforts in bridging fault-tolerant theory with experimental realities. In this role, you will focus on circuit-level design, simulation, and optimization of fault-tolerant protocols under realistic noise models. Your work may include developing/applying noise simulation techniques, designing fault-tolerant circuitry tailored to near-term hardware constraints such as few-qubit or measurement-free architectures, and evaluating trade-offs between different implementations at the circuit level. A key aspect of the role may be integrating these approaches into modular architectures and ensuring compatibility with logical-qubit algorithms, with the aim of making error-corrected quantum computation practically feasible.
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